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100343 Low Power 8-Bit Latch
October 1989 Revised August 2000
100343 Low Power 8-Bit Latch
General Description
The 100343 contains eight D-type latches, individual inputs, (Dn), outputs (Qn), a common enable pin (E), and a latch enable pin (LE). A Q output follows its D input when both E and LE are LOW. When either E or LE (or both) are HIGH, a latch stores the last valid data present on its D input prior to E or LE going HIGH. The 100343 outputs are designed to drive a 50 termination resistor to -2.0V. All inputs have 50 k pull-down resistors.
Features
s Low power operation s 2000V ESD protection s Voltage compensated operating range = -4.2V to -5.7V s Available to industrial grade temperature range
Ordering Code:
Order Number 100343PC 100343QC 100343QI Package Number N24E V28A V28A Package Description 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square Industrial Temperature Range (-40C to +85C)
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Logic Symbol
Connection Diagrams
24-Pin DIP
Pin Descriptions
Pin Names D0-D7 E LE Q0-Q7 NC Description Data Inputs Enable Input Latch Enable Input Data Inputs No Connect
28-Pin PLCC
(c) 2000 Fairchild Semiconductor Corporation
DS010250
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100343
Truth Table
Inputs Dn L H X X
H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care Note 1: Retains data present before either LE or E went HIGH
Outputs LE L L X H Qn L H Latched (Note 1) Latched (Note 1)
E L L H X
Logic Diagram
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100343
Absolute Maximum Ratings(Note 2)
Storage Temperature (TSTG) Maximum Junction Temperature (TJ) VEE Pin Potential to Ground Pin Input Voltage (DC) Output Current (DC Output HIGH) ESD (Note 3)
-65C to +150C +150C -7.0V to +0.5V
VEE to +0.5V
Recommended Operating Conditions
Case Temperature (TC) Commercial Industrial Supply Voltage (VEE) 0C to +85C
-40C to +85C -5.7V to -4.2V
-50 mA 2000V
Note 2: The "Absolute Maximum Ratings" re those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the absolute maximum rating. The "Recommended Operating Conditions" table will define the conditions for actual device operation. Note 3: ESD testing conforms to MIL-STD-883, Method 3015.
Commercial Version DC Electrical Characteristics (Note 4)
VEE = -4.2V to -5.7V, VCC = VCCA = GND, TC = 0C to +85C Symbol VOH VOL VOHC VOLC VIH VIL IIL IIH IEE Parameter Output HIGH Voltage Output LOW Voltage Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage Input LOW Current Input HIGH Current Power Supply Current -95 -97 -55 -55 mA -1165 -1830 0.50 240 Min -1025 -1830 -1035 -1610 -870 -1475 Typ -955 -1705 Max -870 -1620 Units mV mV mV mV mV mV A A VIN = VIH (Max) or VIL (Min) VIN = VIH (Min) or VIL (Max) Conditions Loading with 50 to -2.0V Loading with 50 to -2.0V
Guaranteed HIGH Signal for All Inputs Guaranteed LOW Signal for All Inputs VIN = VIL (Min) VIN = VIH (Max) Inputs Open VEE = -4.2V to -4.8V VEE = -4.2V to -5.7V
Note 4: The specified limits represent the "worst case" value for the parameter. Since these values normally occur at the temperature extremes, additional noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to guarantee operation under "worst case" conditions.
AC Electrical Characteristics
VEE = -4.2V to -5.7V, VCC = VCCA = GND Symbol tPLH tPHL tPLH tPHL tTLH tTHL tS tH tPW(H) Parameter Propagation Delay Dn to Output Propagation Delay LE, E to Output Transition Time 20% to 80%, 80% to 20% Setup Time Hold Time Pulse Width HIGH D0-D7 D0-D7 LE, E TC = 0C Min 0.80 1.40 0.45 1.0 0.1 2.00 Max 2.00 2.90 2.00 TC = +25C Min 0.80 1.40 0.45 1.0 0.1 2.00 Max 2.00 2.90 2.00 TC = +85C Min 0.80 1.60 0.45 1.1 0.1 2.00 Max 2.20 3.10 2.00 ns ns ns ns ns ns Figures 1, 2, 3 (Note 5) Figures 1, 2, 3 (Note 5) Figures 1, 3 Figures 1, 4 Figures 1, 4 Figures 1, 4 Units Conditions
Note 5: The propagation delay specified is for single output switching. Delays may vary up to 300 ps with multiple outputs switching.
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100343
Commercial Version (Continued) PLCC AC Electrical Characteristics
VEE = -4.2V to -5.7V, VCC = VCCA = GND Symbol tPLH tPHL tPLH tPHL tTLH tTHL tS tH tPW(H) tOSHL Parameter Propagation Delay Dn to Output Propagation Delay LE, E to Output Transition Time 20% to 80%, 80% to 20% Setup Time Hold Time Pulse Width HIGH D0-D7 D0-D7 LE, E TC = 0C Min 0.80 1.40 0.45 0.90 0.0 2.00 340 Max 1.80 2.70 1.90 TC = +25C Min 0.80 1.40 0.45 0.90 0.0 2.00 340 Max 1.80 2.70 1.90 TC = +85C Min 0.80 1.60 0.45 1.00 0.0 2.00 340 Max 2.00 2.90 1.90 ns ns ns ns ns ns ps Figures 1, 2, 3 (Note 6) Figures 1, 2, 3 (Note 6) Figures 1, 3 Figures 1, 4 Figures 1, 4 Figures 1, 4 PLCC Only (Note 7) PLCC Only 440 440 440 ps (Note 7) PLCC Only 480 480 480 ps (Note 7) PLCC Only 300 300 300 ps (Note 7) Units Conditions
Maximum Skew Common Edge Output-to-Output Variation Data to Output Path
tOSLH
Maximum Skew Common Edge Output-to-Output Variation Data to Output Path
tOST
Maximum Skew Opposite Edge Output-to-Output Variation Data to Output Path
tPS
Maximum Skew Pin (Signal) Transition Variation Data to Output Path
Note 6: The propagation delay specified is for single output switching. Delays may vary up to 300 ps with multiple outputs switching. Note 7: Output-to-Output Skew is defined as the absolute value of the difference between the actual propagation delay for any outputs within the same packaged device. The specifications apply to any outputs switching in the same direction either HIGH-to-LOW (tOSHL), or LOW-to-HIGH (tOSLH), or in opposite directions both HL and LH (tOST). Parameters tOST and tPS guaranteed by design.
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100343
Industrial Version PLCC DC Electrical Characteristics (Note 8)
VEE = -4.2V to -5.7V, VCC = VCCA = GND, TC = -40C to +85C TC = -40C TC = 0C to +85C Symbol Parameter Min Max Min Max VOH VOL VOHC VOLC VIH VIL IIL IIH IEE Output HIGH Voltage Output LOW Voltage Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage Input LOW Current Input HIGH Current Power Supply Current -95 -97 -50 -50 -95 -97 -55 -55 mA -1170 -1830 0.50 240 -1085 -1830 -1095 -1565 -870 -1480 -1165 -1830 0.50 240 -870 -1575 -1025 -1830 -1035 -1610 -870 -1475 -870 -1620 Units mV mV mV mV mV mV A A VIN = VIH (Max) or VIL (Min) VIN = VIH (Min) or VIL (Max) Guaranteed HIGH Signal for All Inputs Guaranteed LOW Signal for All Inputs VIN = VIL (Min) VIN = VIH (Max) Inputs Open VEE = -4.2V to -4.8V VEE = -4.2V to -5.7V Conditions Loading with 50 to -2.0V Loading with 50 to -2.0V
Note 8: The specified limits represent the "worst case" value for the parameter. Since these values normally occur at the temperature extremes, additional noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to guarantee operation under "worst case" conditions.
PLCC AC Electrical Characteristics
VEE = -4.2V to -5.7V, VCC = VCCA = GND Symbol tPLH tPHL tPLH tPHL tTLH tTHL ts tH tpw(H) Parameter Propagation Delay Dn to Output Propagation Delay LE, E to Output Transition Time 20% to 80%, 80% to 20% Setup Time Hold Time Pulse Width HIGH D0-D7 D0-D7 LE, E TC = -40C Min 0.80 1.40 0.40 0.60 0.8 2.40 Max 1.80 2.70 2.50 TC = +25C Min 0.80 1.40 0.45 0.90 0.0 2.00 Max 1.80 2.70 1.90 TC = +85C Min 0.80 1.60 0.45 1.00 0.0 2.00 Max 2.00 2.90 1.90 Units ns ns ns ns ns ns Conditions Figures 1, 2, 3 (Note 9) Figures 1, 2, 3 (Note 9) Figures 1, 3 Figures 1, 4 Figures 1, 4 Figures 1, 4
Note 9: The propagation delay specified is for single output switching. Delays may vary up to 300 ps with multiple outputs switching.
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100343
Test Circuitry
Note: * * * * * * VCC, VCCA = +2V, VEE = -2.5V L1 and L2 = equal length 50 impedance lines RT = 50 terminator internal to scope Decoupling 0.1 F from GND to VCC and VEE All unused outputs are loaded with 50 to GND CL = Fixture and stray capacitance 3 pF
FIGURE 1. AC Test Circuit
Switching Waveforms
FIGURE 2. Propagation Delays
FIGURE 3. Propagation and Transition Times
FIGURE 4. Setup, Hold and Pulse Width Times
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100343
Physical Dimensions inches (millimeters) unless otherwise noted
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide Package Number N24E
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100343 Low Power 8-Bit Latch
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square Package Number V28A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 8 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com

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